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System-Level Design and Partitioning of a Software
Defined Radio
Links to Implementation on DSPs and FPGAs
- C code generation with Real-Time Workshop
- FPGA implementation with Xilinx
System Generator for DSP
Case Study: SSB Software Defined Radio
- Develop system level model
- Partition design into FPGA + DSP processor
- Implement in hardware
Rapid Prototype Demonstration on Operational Hardware
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