議程: - Model-Based Design Environment for Communication System
- From Model to FPGA / DSP in SignalWAVe Platform
- Co-Simulate RTL Design in Simulink Using Active-HDL
- RF / Microwave Design in MWO Design Suite
參加對象:理工學院相關系所老師、學生、研究人員
費用:免費!
...報名方式:(4 選 1)
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